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Sabtu, 21 Januari 2012

Cedar Logic Simulation(english ver.)

CedarLogic began in fall 2005 as a senior design project at Cedarville University. Until that time, Diglog had been used at that institution as the digital logic simulation program for engineering courses. Since Diglog was very old, the university assigned a team to build a new graphic simulator with a modern, user-friendly interface. During that year, the first version of CedarLogic was built and then released on SourceForge. The following year, the program was extended by another senior design project to implement a Z80 microprocessor.

Currently, the program is multithreaded with a logic simulation engine and a user interface. The UI is built with wxWidgets; the logic gate library and user-designed circuits are saved in a tag markup language.

Description


CEDAR LS is an interactive digital logic simulator to be used for teaching of logic design or testing simple digital designs. It features both low-level logic gates as well as high-level components, including registers and a Z80 microprocessor emulat 


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